Santa Clara Convention Center
Santa Clara, CA
January 28 – January 30, 2020
Come see us at DesignCon 2020 Booth #514 to explore our solutions and see how you can partner with CarlisleIT.
CarlisleIT will be presenting twice during DesignCon 2020. These topics have been chosen by DesignCon to fit the evolving needs of engineers in the industry.
Location: Ballroom F
Date: Tuesday, January 28
Time: 9:00am - 4:30pm
Track: 13. Modeling & Analysis of Interconnects
Format: Boot Camp
Pass Type: All-Access Pass, Alumni All-Access Pass, Boot Camp Pass - Get your pass now!
In this boot camp, we will present different numerical techniques, ranging from computational electromagnetics to frequency and time-domain conversions. The user will see how S-parameters are created in a full-wave solver, how they can be converted between time and frequency domains and what type of information is relevant in each domain. We will start with a simple finite-difference time-domain solver, followed by a finite-element solver in frequency domain and show the advantages and disadvantages of each method. Finally, we will address the information contained in an S-parameter file, and how to extract relevant content in both frequency and time-domains.
We will present different numerical methods used in the signal integrity industry. By the end of this presentation, the audience will be able to understand the basic principles and their implementation in some of the software tools used in the industry today.
Basic understanding of Fourier transform. Some experience with electromagnetic solvers.
Location: Ballroom D
Date: Wednesday, January 29
Time: 2:50pm - 3:30pm
Track: 13. Modeling & Analysis of Interconnects, 12. Applying Test & Measurement Methodology
Format: Technical Session
Pass Type: 2-Day Pass, All-Access Pass, Alumni All-Access Pass - Get your pass now!
In this paper, we will show how the combination of different board configurations (edge-coupled versus broadside-coupled), connectors, cable styles and cable terminations affect the performance when it comes to designing systems for PCIe Gen4, Gen5 and Gen6. We will show, through simulations and measurements, which of these components are the bottle necks when it comes to achieving the required specification. We will examine the trade-offs between cost and performance for each combination of board, connector and cable. We will show the results of each component when simulated/measured by itself and when simulated/measured in the full system topology.
We will present different aspects of the PCIe standards, specially related to the physical layer. At the end, the audience should be able to understand how different components (boards, connectors and cables) impact the performance for different PCIe protocols (4.0, 5.0 and 6.0).
Title: Signal Integrity Engineer
Davi Correia received his PhD degree in Electrical Engineering from the University of Illinois at Urbana-Champaign in 2006. He worked at FCI-Amphenol and Molex before joining Carlisle SI team in June 2016. His main areas of expertise are signal integrity, electromagnetic theory and applications, numerical methods and programming. He is interested in applying his knowledge into teaching, researching and developing new products and methods. A particular area of interest for him is in the automation of different aspects of product design, freeing up engineering time (both his own and his peers) to focus on the bigger issues and root-cause problems. He is one of the recipients of DesignCon 2019 best paper award. When he is not working, he is also an amateur water polo player, a devoted husband and a proud father.
Title: Mechanical Engineer
Kelsey Fisher received his bachelor in mechanical engineering in 2014. He joined Carlisle after his graduation and is currently responsible for the design of the new connector family of digital connectors at CarlisleIT.
Title: Director of Engineering
Emad Soubh holds 2 BS, one in mechanical engineering and the second in electrical engineering. In addition, he also received his MBA from Washington State University in 1996. Emad has been in the Test and Measurements Industry for 27 years, where he holds 40+ patents and has focused on high speed interconnects. Emad currently holds the position of Engineering Director at Carlisle Interconnect Technologies. He is one of the recipients of DesignCon 2019 best paper award. Prior to Carlisle, Emad held the position of Director on new product development at AirBorn Inc.
Title: Signal Integrity Engineer
Raul Stavoli is a Signal Integrity Engineer at Carlisle Interconnect Technologies, who specializes in high frequency design. He received a bachelor's degree in electrical engineering from San Francisco State University in 2014. Upon graduation, he worked as a Signal Integrity Engineer at Molex, LLC where he designed 1Gb and 10Gb Ethernet magnetic jacks, PCBs, magnetics and developed MATLAB based software for time and frequency domain analysis. He joined Carlisle IT in November 2017 where is currently responsible for the RF connector design and measurements, ranging from 5 to 110GHz. He is one of the recipients of DesignCon 2019 best paper award.